1. Technical Field
This invention relates generally to semiconductor devices, and more particularly to Ball Grid Array packages suitable for use in Printed Circuit Boards. The Ball Grid Array packages have solder ball mounting groove pads for facilitating the locating of solder balls and for reinforcing the bonding strength between the solder balls and the circuit board, resulting in increased resistance to cracking of the solder balls.
2. Description of the Prior Art
Miniaturization of semiconductor device size has been an important topic in the art, when the device requires more I/O pins according to the increase of device density. The multi I/O pins, however, require the lead pitch of the package device to be smaller. As a result, the leads become more fragile to external impacts, the performance of the final package device may be degraded due to parasitic parameters of the thinner package leads, and more attention should be paid in management of the package device.
Ball Grid Array (hereinafter abbreviated as `BGA`) packages known from e.g., U.S. Pat. No. 5,355,283 are new and upgraded versions of PGA (Pin Grid Array) packages. The BGA packages are more suitable for use in high I/O pin devices than PGA packages, since then can avoid negative inductive parameters of the long pin leads of the PGA package while maintaining the efficiency of the I/O pins of the Grid Array packages. Further, the BGA package is capable of high mounting density since it can, unlike the PGA package, utilize a Surface Mounting Technique (SMT).
FIG. 1 shows a conventional BGA package 10. A semiconductor chip 2 on which a predetermined circuit pattern is formed through a wafer process is mounted onto the substrate 1, for example, Printed Circuit Board (PCB). The electrical interconnection between the chip 2 and the PCB 1 is achieved by bonding wires 3. An encapsulation resin 4 such as an Epoxy Molding Compound is used to protect the chip and the bonding wires from the external environment. On the bottom surface of the PCB 1 are attached a plurality of solder balls 5. Because the solder balls 5 and the semiconductor chip 2 are electrically interconnected by a pre-designed wiring pattern within the PCB 1 (not shown), both electrical signals from external devices to the chip 2 and data signals from the chip 2 can pass through the solder balls 5. Particularly, if the solder balls 5 were used as supply power or ground power terminals, the shorter electrical length of the solder balls 5 would reduce the inductance and resistance of the package leads. The solder balls 5 further contribute to the heat dissipation from the semiconductor chip 2.
FIG. 2A is an enlarged and inverted view of portion "A" in FIG. 1. It can be seen that the solder balls 5 are to be mounted onto the bottom surface of the PCB 1. A number of pads 7 which are electrically and mechanically coupled to the solder balls 5 are formed on the back of the PCB 1. On the entire surface of the back of the PCB 1 excepting the areas for the solder ball pads 7 is deposited solder resister 8 (also referred to as `solder mask`) in order to prevent a solder bridge between solder balls and to protect the back face of the PCB 1 and the wiring pattern. After a flux 6 is coated on the pad 7, solder balls 5 are mounted on a position denoted by an arrow in FIG. 2A. The mounted solder balls 5 will adhere to the pad 7 as shown in FIG. 2B through a well-known reflow solder process.
FIG. 3 is a cross sectional view of the conventional BGA package mounted onto a main board 9 of a system. The system's main board 9 has a solder ball receiving pad 11 which is, for example, constructed as disclosed in U.S. Pat. No. 4,940,181 for receiving the solder balls 5. By applying additional reflow solder process to the BGA package 10, it is completely mounted onto the main board 9.
However, thermal stress will be generated in the solder balls 5 and the mating components thereto during these reflow solder processes. In the worst case, this stress can cause cracks of solder balls 5 not only at the position "B" as shown in FIG. 2B, i.e., at the necks of the mounted solder balls 5, but also at the interface (denoted as `C` in FIG. 3) of the solder balls 5 with the main system board 9.
The weakness of the bonding force of the solder balls 5 resulting from the crack can be considered in two ways. When the solder balls 5 are detached from the system board 9, this failure can be repaired by re-mounting the BGA package 10 on the board 9. In this case, however, the solder balls 5 will undergo twice the amount of stress by twice being subjected to the reflow solder precesses. When the solder balls 5 are detached from the PCB substrate 1, it is impossible to remount the BGA package 10 onto the main board 9.
Further, since the solder balls 5 are attached, as shown in FIG. 2B, to the pad 7 on which solder resist 8 is not deposited, the bonding strength of the solder balls 5 to the pads 7 becomes weak and the solder balls 5 are easy to detach when even a small amount of contamination substance penetrates into the bonding interface. Moreover, it is a troublesome operation to accurately locate and align each of the solder balls 5 onto the PCB 1, because the pad 7 of the conventional BGA package 10 has a flat upper surface.